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PROFET(R) Target Data Sheet BTS560
Smart Highside High Current Power Switch
Features
* Overload protection * Current limitation * Short circuit protection * Overtemperature protection * Overvoltage protection (including load dump) * Clamp of negative voltage at output * Fast deenergizing of inductive loads 1) * Low ohmic inverse current operation * Reverse battery protection * Diagnostic feedback with load current sense * Open load detection via current sense * Loss of Vbb protection2) * Electrostatic discharge (ESD) protection
Product Summary Overvoltage protection Output clamp Operating voltage On-state resistance Load current (ISO) Short circuit current limitation Current sense ratio
Vbb(AZ) 70 V VON(CL) 60 V Vbb(on) 5.0 ... 55 V RON 4 m IL(ISO) 96 A IL(SCp) 320 A IL : IIS 25 000
TO-218AB/5
* Power switch with current sense diagnostic feedback for up to 48 V DC grounded loads * Most suitable for loads with high inrush current like lamps and motors; all types of resistive and inductive loads * Replaces electromechanical relays, fuses and discrete circuits
Application
5 1 Straight leads
General Description
N channel vertical power FET with charge pump, current controlled input and diagnostic feedback with load current sense, integrated in Smart SIPMOS(R) chip on chip technology. Fully protected by embedded protection functions.
3 & Tab
Voltage source Overvoltage protection Current limit Gate protection
OUT R bb + V bb
1, 5
IL
Voltage sensor
Charge pump Level shifter Rectifier
Limit for unclamped ind. loads Output Voltage detection Current Sense
2
IN
Load
ESD
Logic
I IN
Temperature sensor
IS
I IS
(R) PROFET
Load GND
VIN V IS
Logic GND
4
R IS
1) 2)
With additional external diode. Additional external diode required for energized inductive loads (see page 8).
Semiconductor Group
Page 1 of 15
1998-Jun-17
Target Data Sheet BTS560
Pin 1 2 3
Symbol OUT IN Vbb O I
Function Output to the load. The pins 1 and 5 must be shorted with each other especially in high current applications!3) Input, activates the power switch in case of short to ground Positive power supply voltage, the tab is electrically connected to this pin. In high current applications the tab should be used for the Vbb connection instead of this pin4). Diagnostic feedback providing a sense current proportional to the load current; zero current on failure (see Truth Table on page 6) Output to the load. The pins 1 and 5 must be shorted with each other especially in high current applications!3)
+
4 5
IS OUT
S O
Maximum Ratings at Tj = 25 C unless otherwise specified Parameter Supply voltage (overvoltage protection see page 4) Supply voltage for full short circuit protection, resistive load or L < tbd H Tj,start =-40 ...+150C: Load current (short circuit current, see page 4) Load dump protection VLoadDump = UA + Vs, UA = 13.5 V RI5) = 2 , RL = 0.1 , td = 200 ms, IN, IS = open or grounded Operating temperature range Storage temperature range Power dissipation (DC), TC 25 C Inductive load switch-off energy dissipation, single pulse Vbb = 12V, Tj,start = 150C, TC = 150C const., IL = tbd (>=20) A, ZL = tbd mH, 0 , see diagrams on page 9 Electrostatic discharge capability (ESD)
Human Body Model acc. MIL-STD883D, method 3015.7 and ESD assn. std. S5.1-1993, C = 100 pF, R = 1.5 k
Symbol Vbb Vbb
Values 60 55 self-limited 80 -40 ...+150 -55 ...+150 310 tbd 2.0 +15 , -250 +15 , -250
Unit V V A V C W J kV mA
IL VLoad dump6) Tj Tstg Ptot EAS VESD IIN IIS
Current through input pin (DC) Current through current sense status pin (DC)
see internal circuit diagrams on page 7
3) 4) 5) 6)
Not shorting all outputs will considerably increase the on-state resistance, reduce the peak current capability and decrease the current sense accuracy Otherwise add up to 0.5 m (depending on used length of the pin) to the RON if the pin is used instead of the tab. RI = internal resistance of the load dump test pulse generator. VLoad dump is setup without the DUT connected to the generator per ISO 7637-1 and DIN 40839.
Semiconductor Group
Page 2
1998-Jun-17
Target Data Sheet BTS560 Thermal Characteristics
Parameter and Conditions Thermal resistance Symbol min --chip - case: RthJC7) junction - ambient (free air): RthJA Values typ max -- 0.40 30 -Unit K/W
Electrical Characteristics
Parameter and Conditions
at Tj = -40 ... +150 C, Vbb = 12 V unless otherwise specified
Symbol
Values min typ max
Unit
Load Switching Capabilities and Characteristics On-state resistance (Tab to pins 1,5, see measurement IL = tbd (>=20) A, Tj = 25 C: RON circuit page 7) VIN = 0, IL = tbd (>=20) A, Tj = 150 C: IL = 150 A, Tj = 150 C: Nominal load current8) (Tab to pins 1,5) ISO 10483-1/6.7: VON = 0.5 V, Tc = 85 C 9) Maximum load current in resistive range (Tab to pins 1,5) VON = 1.8 V, Tc = 25 C: see diagram on page 12 VON = 1.8 V, Tc = 150 C: 10) Turn-on time IIN to 90% VOUT: Turn-off time IIN to 10% VOUT: RL = 1 , Tj =-40...+150C Slew rate on 10) (10 to 30% VOUT ) RL = 1 Slew rate off 10) (70 to 40% VOUT ) RL = 1
--
3.3 6.5
4.0 7.8 7.9 --
m
IL(ISO) IL(Max) ton toff
dV/dton -dV/dtoff
80
96
A
tbd tbd 130 60 ---
----0.8 0.8
--550 240 ---
A s
V/s V/s
Inverse Load Current Operation On-state resistance (Pins 1,5 to pin 3) VbIN = 12 V, IL = - tbd (>=20) A
Tj = 25 C: RON(inv) see diagram on page 9 Tj = 150 C: Nominal inverse load current (Pins 1,5 to Tab) IL(inv) 9 VON = -0.5 V, Tc = 85 C Drain-source diode voltage (Vout > Vbb) -VON IL = - tbd (>=20) A, IIN = 0, Tj = +150C
-80 --
3.3 6.5 96 tbd
4.0 7.8 ---
m A mV
7) 8) 9) 10)
Thermal resistance RthCH case to heatsink (about 0.25 K/W with silicone paste) not included! Not tested, specified by design. TJ is about 105C under these conditions. See timing diagram on page 13.
Semiconductor Group
Page 3
1998-Jun-17
Target Data Sheet BTS560
Parameter and Conditions
at Tj = -40 ... +150 C, Vbb = 12 V unless otherwise specified
Symbol
Values min typ max
Unit
Operating Parameters Operating voltage (VIN = 0) 11) Undervoltage shutdown 12) Undervoltage start of charge pump see diagram page 14 Overvoltage protection13) Tj =-40C: Ibb = 15 mA Tj = 25...+150C: Standby current Tj =-40...+25C: IIN = 0 Tj = 150C: Protection Functions Short circuit current limit (Tab to pins 1,5)
Vbb(on) VbIN(u) VbIN(ucp) VbIN(Z) Ibb(off)
5.0 --68 70 ---
-3.5 5 -74 15 25
55 4.5 6.5 --25 60
V V V V A
Tc =-40C: IL(SCp) Tc =25C: Tc =+150C: Short circuit shutdown delay after input current positive slope, VON > VON(SC) td(SC)
min. value valid only if input "off-signal" time exceeds 30 s
VON = 12 V, time until shutdown max. 300 s
-tbd tbd 80 ---
370 320 225 -15 17
-tbd tbd 300 ---
A
s V
Output clamp 14) (inductive load switch off)
(typ. IIS = -120A)
IL= 40 mA: -VOUT(CL) IL= 20 A:
Output clamp (inductive load switch off) at VOUT = Vbb - VON(CL) (e.g. overvoltage) IL= 40 mA Short circuit shutdown detection voltage
(pin 3 to pins 1,5)
VON(CL) VON(SC)
60 --
64 6
68 --
V V
11) 12) 13) 14)
For all voltages 0 ... 55 V the device is fully protected against overtemperature and short circuit. VbIN = Vbb - VIN see diagram on page 7. When VbIN increases from less than VbIN(u) up to VbIN(ucp) = 5 V (typ.) the charge pump is not active and VOUT Vbb - 3 V. See also VON(CL) in circuit diagram on page 8. This output clamp can be "switched off" by using an additional diode at the IS-Pin (see page 7). If the diode is used, VOUT is clamped to Vbb- VON(CL) at inductive load switch off.
Semiconductor Group
Page 4
1998-Jun-17
Target Data Sheet BTS560
Parameter and Conditions
at Tj = -40 ... +150 C, Vbb = 12 V unless otherwise specified
Symbol
Values min typ max 150 --10 ---
Unit
Thermal overload trip temperature Thermal hysteresis
Tjt Tjt
C K
Reverse Battery Reverse battery voltage 15) -Vbb On-state resistance (Pins 1,5 to pin 3) Tj = 25 C: RON(rev) Vbb = -12V, VIN = 0, IL = - tbd (>=20) A, RIS = 1 kTj = 150 C: Integrated resistor in Vbb line Diagnostic Characteristics Current sense ratio, static on-condition, kILIS = IL : IIS, VON < 1.5 V16), VIS 4.5 V
---
-3.7 0 tbd
42 tbd 0 --
V m
Rbb
--
-40C: kILIS 25C: 150C:
see diagram on page 11
IL = 150 A: IL = 25 A: IL = 12 A: IL = 6 A: IIS,lim
----40C: 4.5% 8.9% 15% 46% -5.5 -----68 70
26 530 25 430 23 520 +25C: 4.2% 7.5% 12% 36% ---2 tbd tbd tbd -74
---150C: 4.0% 6.1% 9.0% 24% --0.5 -500 500 500 --mA A
IIN = 0, IIS=0(e.g. during deenergizing of inductive loads):
Sense current saturation Current sense leakage current
IIN = 0, VIS = 0: IIS(LL) VIN = 0, VIS = 0, IL 0: IIS(LH) Current sense settling time17) after positive input slope (90% of IIS static) IL = 0 / tbd (>=20) A: tson(IS) Current sense settling time17) after negative input slope (10% of IIS static) IL = tbd (>=20) / 0 A: tsoff(IS) 17) after change of load Current sense settling time current (60% to 90%) IL = 15 / tbd (>=20) A: tslc(IS) Overvoltage protection Tj =-40C: VbIS(Z) Ibb = 15 mA Tj = 25...+150C:
s s s V
15)
16)
17)
The reverse load current through the intrinsic drain-source diode has to be limited by the connected load (as it is done with all polarity symmetric loads). Note that under off-conditions (I IN = I IS = 0) the power transistor is not activated. This results in raised power dissipation due to the higher voltage drop across the intrinsic drain-source diode. The temperature protection is not active during reverse current operation! Increasing reverse battery voltage capability is simply possible as described on page 8. If VON is higher, the sense current is no longer proportional to the load current due to sense current saturation, see IIS,lim . Not tested, specified by design.
Semiconductor Group
Page 5
1998-Jun-17
Target Data Sheet BTS560
Parameter and Conditions
at Tj = -40 ... +150 C, Vbb = 12 V unless otherwise specified
Symbol
Values min typ max
Unit
Input Input and operating current (see diagram page 12) IIN(on)
IN grounded (VIN = 0)
---
1 --
2 40
mA A
Input current for turn-off18)
IIN(off)
Truth Table
Input current level Normal operation Very high load current Currentlimitation Short circuit to GND Overtemperature Short circuit to Vbb Open load Negative output voltage clamp Inverse load current L H H H L H L H L H L H L L H Output level L H H H L L L L H H Z20) H L H H Current Sense IIS 0 nominal IIS, lim 0 0 0 0 0 0 VON(Fold back) if VON>VON(SC), shutdown will occure Remark
L = "Low" Level H = "High" Level Overtemperature reset via input: IIN=low and Tj < Tjt (see diagram on page 15) Short circuit to GND: Shutdown remains latched until next reset via input (see diagram on page 13)
18)
We recommend the resistance between IN and GND to be less than 0.5 k for turn-on and more than 500k for turn-off. Consider that when the device is switched off (IIN = 0) the voltage between IN and GND reaches almost Vbb. Low ohmic short to Vbb may reduce the output current IL and can thus be detected via the sense current IIS. Power Transistor "OFF", potential defined by external impedance.
19) 20)
Semiconductor Group
Page 6
1998-Jun-17
Target Data Sheet BTS560
Terms
I bb VbIN 3 Vbb IL V bb RIN V
IN
Current sense status output
Vbb
VON
R bb
ZD
V
Z,IS
IS
2
IN PROFET IS
OUT 1,5
I IS R
IS
VIS
VbIS I IN VIS
4
I IS DS R IS VOUT
Two or more devices can easily be connected in parallel to increase load current capability.
RON measurement layout
5.5 mm
VZ,IS = 74 V (typ.), RIS = 1 k nominal (or 1 k /n, if n devices are connected in parallel). IS = IL/kilis can be only driven by the internal circuit as long as Vout - VIS > 5 ??? V. If you want to measure load currents up to Vbb - 5 ??? V IL(M), RIS should be less than . IL(M) / Kilis Note: For large values of RIS the voltage VIS can reach almost Vbb. See also overvoltage protection. If you don't use the current sense output in your application, you can leave it open.
Short circuit detection
Fault Condition: VON > VON(SC) (6 V typ.) and t> td(SC) (80 ...300 s).
+ Vbb
Vbb force contacts
Out Force Sense contacts contacts (both out pins parallel)
VON
OUT
Input circuit (ESD protection)
V bb
Logic unit
Short circuit detection
V V bIN
ZD
R bb
Inductive and overvoltage output clamp
+ Vbb VZ1
Z,IN
IN I
IN
VON
VZG
OUT
V IN
IS
PROFET
DS VOUT
When the device is switched off (IIN = 0) the voltage between IN and GND reaches almost Vbb. Use a mechanical switch, a bipolar or MOS transistor with appropriate breakdown voltage as driver. VZ,IN = 74 V (typ).
VON is clamped to VON(Cl) = 62 V typ. At inductive load switch-off without DS, VOUT is clamped to VOUT(CL) = -15 V typ. via VZG. With DS, VOUT is clamped to Vbb VON(CL) via VZ1. Using DS gives faster deenergizing of
Semiconductor Group
Page 7
1998-Jun-17
Target Data Sheet BTS560
the inductive load, but higher peak power dissipation in Vbb disconnect with energized inductive the PROFET. load
Overvoltage protection of logic part
+ Vbb V R IN
Z,IN
V
Z,IS
R bb
Provide a current path with load current capability by using a diode, a Z-diode, or a varistor. (VZL < 70 V or VZb < 42 V if RIN=0). For higher clamp voltages currents at IN and IS have to be limited to 250 mA. Version a:
IN
Logic V OUT
IS
V
bb IN
V
bb OUT
PROFET
RV
Signal GND
PROFET
R IS
V Z,VIS
IS
Rbb = 120 typ., VZ,IN = VZ,IS = 74 V typ., RIS = 1 k nominal. Note that when overvoltage exceeds 79 V typ. a voltage above 5V can occur between IS and GND, if RV, VZ,VIS are not used. Version b:
V ZL
Reverse battery protection
- V bb
Rbb
V
bb IN
Vbb PROFET OUT
IN OUT
IS
R IN
Logic
IS
Power Transistor
V Zb
DS
RL RV
Power GND
D
Signal GND
RIS
Note that there is no reverse battery protection when using a diode without additional Z-diode VZL, VZb. Version c: Sometimes a neccessary voltage clamp is given by non inductive loads RL connected to the same switch and eliminates the need of clamping circuit:
RV 1 k, RIS = 1 k nominal. Add RIN for reverse battery protection in applications with Vbb above 1 1 1 16 V15); recommended value: + + = RIN RIS RV 0.1A 1 0.1A if DS is not used (or = if DS RIN |Vbb| - 12V |Vbb| - 12V is used). To minimize power dissipation at reverse battery operation, the summarized current into the IN and IS pin should be about 120mA. The current can be provided by using a small signal diode D in parallel to the input switch, by using a MOSFET input switch or by proper adjusting the current through RIS and RV.
V
bb IN
Vbb PROFET OUT
RL
IS
Semiconductor Group
Page 8
1998-Jun-17
Target Data Sheet BTS560
Inverse load current operation
Energy stored in load inductance:
EL = 1/2*L*I L
V bb
+ IN Vbb
2
- IL
PROFET IS OUT
While demagnetizing load inductance, the energy dissipated in PROFET is
EAS= Ebb + EL - ER= VON(CL)*iL(t) dt,
with an approximate solution for RL > 0 : IL* L IL*RL (Vbb + |VOUT(CL)|) ln (1+ |V ) 2*RL OUT(CL)|
-
V OUT + IIS
-
V IN V IS
EAS=
R IS
The device is specified for inverse load current operation (VOUT > Vbb > 0V). The current sense feature is not available during this kind of operation (IIS = 0). With IIN = 0 (e.g. input open) only the intrinsic drain source diode is conducting resulting in considerably increased power dissipation. If the device is switched on (VIN = 0), this power dissipation is decreased to the much lower value RON(INV) * I2 (specifications see page 3). Note: Temperature protection during inverse load current operation is not possible!
Maximum allowable load inductance for a single switch off
L = f (IL ); Tj,start = 150C, Vbb = 12 V, RL = 0
L [mH] 10000
1000
Inductive load switch-off energy dissipation
E bb E AS V V bb ELoad bb i L(t) IN PROFET OUT EL
100
10
IS I ZL
{
L
1 0 2.5 5 7.5 10 12.5 15
IN
RIS
RL
ER
IL [A]
Semiconductor Group
Page 9
1998-Jun-17
Target Data Sheet BTS560
Options Overview Type BTS Overtemperature protection with hysteresis Tj >150 C, latch function21) Tj >150 C, with auto-restart on cooling Short circuit to GND protection
switches off when VON>6 V typ. (when first turned on after approx. 180 s)
660P 560
X X X X X22) X X X22) X X
Overvoltage shutdown Output negative voltage transient limit
to Vbb - VON(CL) to VOUT = -15 V typ
21)
22)
Latch except when Vbb -VOUT < VON(SC) after shutdown. In most cases VOUT = 0 V after shutdown (VOUT 0 V only if forced externally). So the device remains latched unless Vbb < VON(SC) (see page 4). No latch between turn on and td(SC). Can be "switched off" by using a diode DS (see page 7) or leaving open the current sense output.
Semiconductor Group
Page 10
1998-Jun-17
Target Data Sheet BTS560
Characteristics
Current sense versus load current: IIS = f(IL) IIS [mA] 6 Current sense ratio: KILIS = f(IL), TJ = 25 C kilis
35000 33000
5
31000 29000
4 max 3 min
27000 typ 25000 23000
max
min
2
21000 19000 17000
1
0 0 50 100 150 200
15000 0 50 100 150 200
IL [A]
Current sense ratio: KILIS = f(IL), TJ = -40 C kilis
35000 33000 31000 29000 27000 25000 min 23000 21000 19000 17000 15000 0 50 100 150 200 23000 21000 19000 17000 15000 0 50 100 150 min typ max
IL [A]
Current sense ratio: KILIS = f(IL), TJ = 150 C kilis
35000 33000 31000 29000 27000 25000 typ max
200
IL [A]
IL [A]
Semiconductor Group
Page 11
1998-Jun-17
Target Data Sheet BTS560
Typ. current limitation characteristic IL = f (VON, Tj ) Typ. input current IIN = f (VbIN), VbIN = Vbb - VIN IIN [mA] 1.6
1.4 1.2
VON>VON(SC) only for t < td(SC) (otherwise immediate shutdown)
IL [A]
1000 900 800 700 600 500 Tj = -40C 400 85C 300 200 150C 25C
1 0.8 0.6 0.4 0.2
100 0 0 VON(FB) 5 AyqA7hpx 10 15 20
0 0 20 40 60 80
VON [V] In case of VON > VON(SC) (typ. 6 V) the device will be switched off by internal short circuit detection. Typ. on-state resistance RON = f (Vbb, Tj ); IL = tbd (>=20) A; VIN = 0
VbIN [V]
RON [mOhm] 9
8 static dynamic
7 Tj = 150C 6 85C 25C -40C 3
5
4
2 0 5 10 15
Vbb
40 20 [V]
Semiconductor Group
Page 12
1998-Jun-17
Target Data Sheet BTS560
Timing diagrams
Figure 1a: Switching a resistive load, change of load current in on-condition: Figure 2b: Switching an inductive load:
IIN
IIN
VOUT
90% t on dV/dton 10% t off
dV/dtoff
VOUT
IL
tslc(IS)
t slc(IS)
IL
Load 1
Load 2
IIS
t t
IIS
tson(IS)
t soff(IS)
The sense signal is not valid during a settling time after turn-on/off and after change of load current.
Figure 3a: Short circuit: shut down by short circuit detection, reset by IIN = 0.
Figure 2a: Switching motors and lamps:
IIN
IIN IL IL(SCp) VOUT td(SC)
IIL
IIS VOUT>>0 VOUT=0 t
IIS
t
Shut down remains latched until next reset via input.
Sense current saturation can occur at very high inrush currents (see IIS,lim on page 5).
Semiconductor Group
Page 13
1998-Jun-17
Target Data Sheet BTS560
Figure 4a: Overtemperature, Reset if (IIN=low) and (TjI IN
IS
V
OUT
T
J
t
Figure 6a: Undervoltage restart of charge pump, overvoltage clamp
12
VOUT
10
VIN = 0
VON(CL
8 dynamic, short Undervoltage not below VbIN(u)
6
4
2
IIN = 0
VON(CL)
0 0
VbIN(u) 2
4
6 8 VbIN(ucp)
10
12
Semiconductor Group
Page 14
1998-Jun-17
Target Data Sheet BTS560
Package and Ordering Code
All dimensions in mm
TO-218AB/5 Option E3146 Ordering code
BTS560 E3146 Q67060-S6953A3
Published by Siemens AG, Bereich Halbleiter Vetrieb, Werbung, Balanstrae 73, D-81541 Munchen (c) Siemens AG 1998. All Rights Reserved Attention please! As far as patents or other rights of third parties are concerned, liability is only assumed for components, not for applications, processes and circuits implemented within components or assemblies. The information describes a type of component and shall not be considered as warranted characteristics. Terms of delivery and rights to change design reserved. For questions on technology, delivery and prices please contact the Semiconductor Group Offices in Germany or the Siemens Companies and Representatives worldwide (see address list). Due to technical requirements components may contain dangerous substances. For information on the types in question please contact your nearest Siemens Office, Semiconductor Group. Siemens AG is an approved CECC manufacturer. Packing: Please use the recycling operators known to you. We can also help you - get in touch with your nearest sales office. By agreement we will take packing material back, if it is sorted. You must bear the costs of transport. For packing material that is returned to us unsorted or which we are not obliged to accept, we shall have to invoice you for any costs incurred. Components used in life-support devices or systems must be expressly authorised for such purpose! Critical components23) of the Semiconductor Group of Siemens AG, may only be used in life supporting devices or systems24) with the express written approval of the Semiconductor Group of Siemens AG.
23) A critical component is a component used in a life-support device or system whose failure can reasonably be expected to cause the failure of that life-support device or system, or to affect its safety or effectiveness of that device or system. 24) Life support devices or systems are intended (a) to be implanted in the human body or (b) support and/or maintain and sustain and/or protect human life. If they fail, it is reasonably to assume that the health of the user or other persons may be endangered.
Semiconductor Group
Page 15
1998-Jun-17

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